Analog Mixed-Signal Design Verification Engineer Swindon 2023

Lock Applications for this job are now closed

At Apple, we are designing for the future. Can you imagine being part of a team helping to making that happen? Help us craft products that enrich people people's lives and be part of a team leading the way in IC design and Verification.

We have an opportunity for a graduate position as Analog Mixed Signal Verification Engineer at our Swindon office, to assist us in verifying the next generation of power management unit ICs in close collaboration with the design teams. Grow your practical skills to achieve verification goals, develop a broad knowledge base in power management analog and digital systems and find new ways to solve the problems of today.

Responsibilities include, top level verification of PMUs, testing specific features and analysing the analog to digital interactions between electronic circuits. A successful candidate will work with international multi-disciplinary teams and be part of a global community of world leading Analog Mixed Signal verification engineers. This is a great opportunity to learn from the best and kick-start your career in the fast lane.

Key Qualifications

  • Theoretical experience with analog systems and electronic building blocks related to Power management: Amplifiers, linear regulators, switching converters, reference circuitry, band-gaps, data converters, and clock generators. Practical experience here is a plus.
  • A passion for programming, with experience in scripting languages a bonus. Examples include, but not limited to: Python, Tcl, perl, unix shell languages
  • Developing verification scripts with an eye for high quality reusable code.
  • An inquisitive mind, to dig deep and get to the truth of glitches, mode failures and specification failures. Be responsible for initial identification and debug of issues.
  • Basic understanding of circuit simulators and industry vendor tools such e.g. Cadence Design Systems and analog mixed signal simulations.
  • Familiarity with Analog behavioural models: Verilog-A, Verilog-AMS.
  • Desirable to have awareness of Verilog and system Verilog verification methodologies, and application of monitors, checkers and assertions (MCAs)
  • Interpersonal skills to present work done and explain results.
  • Ability to work well in a multifaceted team, take ownership and motivate self and others
  • Tenacious approach to drive for results.
  • Fluent English Language skills are required

Description

  • Participate on the definition of a Verification Plan for a mixed-signal IP block.- Attend Design reviews and review Design specifications to learn details on the IPs under test and its use in the system. - Work within a team to drive the verification activities to meet verification goals. - Write the models and stimulus required to achieve a sequence of system behaviour and achieve test coverage.- Work closely with Design teams to communicate results.- Work closely with peers to achieve efficient and aligned methodologies

Education Experience

BS/MS in Electrical Engineering, Computer Engineering or equivalent is required.

Additional Requirements

  • Some international travel required.
  • Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
DEADLINE 14th December 2023